Analysis of CP signal problem in EV AC charging

With the rapid popularization of electric vehicle, the reliability and safety of charging infrastructure, as an important part of “new infrastructure”, have attracted increasing attention.

For the majority of car owners, a smooth and efficient charging experience is behind the precise and stable control system in the charging pile working silently. In the process of AC charging, the “language” core of communication between charging piles and vehicles is the Control Pilot (CP) signal.

This seemingly subtle PWM (pulse width modulation) signal actually shoulders multiple key missions, such as establishing connection, transferring charging capacity, monitoring insulation status and so on.

Once the CP signal is deviated or distorted, it will lead to charging interruption, experience discount, and may cause potential safety hazards. Today, we will go deep into the technical details and analyze the three most common problems and solutions of CP signals in the test and use of EV AC charging piles.

 

1.CP signal PWM amplitude exceeds the limit

1.1 Negative 12V detection of CP signal PWM

During the test, the PWM amplitude overrun is mainly concentrated at -12 V overrun.

According to IEC standards, at least one test of -12 V shall be initiated by the charging point during the charging process, the main purpose of which is to verify the presence of the terminal diode.

Some charging piles often ignore the importance of -12 V detection in the design, and do not detect it. -12 V is generally generated by the power supply module in the charging point.

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Fig. 1 Application Circuit Diagram of 5V to ± 12V Micropower Supply

 

1.2 Solution of negative value overrun

The specifications of the commonly used driving power supply in the charging pile are 5 V, 12 V and 24 V. There are two common design methods for 12 V.

One is generated by 220 V to ± 12 V single-channel or multi-channel power supply modules. The power of such power supply modules is generally between tens of watts and hundreds of watts. The volume is large and the output is adjustable.

One is to use the existing 5 V or 24 V driving power supply, which is generated by the 5 V or 24 V to ± 12 V micro-power power supply module. This kind of micro-power power supply module is generally used in occasions with strict installation space requirements, such as wall-mounted AC charging piles. However, the 12 V output of this mode is not adjustable;.

For these two design methods, the common solutions are as follows:

(1) For the charging pile with output of ± 12 V single-channel or multi-channel power supply module, this kind of power supply output has a certain range of linear adjustment function, such as RD-35 A switching power supply, which has a linear adjustment rate of ± 1.5% at 12 V output. The output voltage is continuously adjustable between 11.82 V and 12.18 V, and the requirement can be met by adjusting the output.

(2) For charging points using a 5 V or 24 V to ± 12 V micropower supply, use a DC/DC power supply type A0512S-2 WR2 as mentioned above. One solution is to add a suitable resistor R0 between the output -12 V and the GND pin, as shown in Figure 1, to lower or raise the magnitude of -12 V according to the deviation, so that it meets the deviation requirements. Table 1 lists the change of -12 V when the charging point increases different R0. Another way is to change the amplitude of the input terminal Vin by connecting a suitable resistor R1 in series between the Vin and the GND pin, as shown in Figure 1, to reduce the input voltage of the power supply. According to the output characteristics of the power supply, the output voltage changes accordingly. According to the actual test, the -12 V voltage deviation is significantly improved after the charging pile is connected with a 4.2 Ω resistor in series between Vin and GND. Table 2 lists the -12 V voltage change before and after the addition of R1.

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Table 1 R0 Resistance and -12 V Variation

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Table 2 Corresponding Table of R1 Resistance and -12V Change

 

2.PWM rise and fall time exceeds the limit

If the rise and fall time of PWM exceeds the standard, the PWM waveform will be distorted, and the rise and fall time of PWM is required to be 2 μs.

For the AC charging pile with connection mode B, the PWM rise and fall time is measured directly from the PCB output end. For the charging pile with connection mode C, the method of measuring from the gun head is generally adopted.

During the test, it was found that the charging point with connection type C was affected by the cable of the charging connector (the capacitive effect of the cable is represented by C5 in Figure 3).

The rise and fall time of the PWM waveform measured from the charging gun interface does not meet the requirement of 2 μs. Therefore, for the AC charging pile with connection mode C, the same test mode as connection mode B is used to retest the rise and fall time of PWM wave.

 

At present, the common CP signal generation circuits are mainly divided into two categories:

The first mode is the design mode in which the circuit composed of a comparator and an operational amplifier is connected after the output of the MCU, as shown in Figure 2. In this design mode, the ground capacitor C217 has a significant impact on the rise and fall time of the PWM waveform, and reasonable adjustment of the capacitor parameters can generally meet the design requirements;

The second way is that the output of MCU is connected to the push-pull circuit composed of triodes. Fig. 3 is the partial schematic diagram of PWM signal generation in mode 2. The MCU chip outputs 3.3 V PWM wave, and the rear stage generates CP signal through push-pull amplification circuit. The typical push-pull circuit is mainly composed of the optocoupler in the dotted line box 1, the triode in the dotted line box 2 and the capacitor in the back-end box 3 in fig. 3. At the CP output end, the C4 capacitor is connected in parallel to play the role of filtering. The measured results show that all of them have an effect on the rise and fall time of PWM wave.

 

In view of the causes of the problem, the following aspects are generally used to solve the problem of excessive rise and fall time:

(1) Type selection of optocoupler, for example, high-speed optocoupler is used to replace ordinary optocoupler;

(2) Selection of the triode, such as improving the switching response time of the triode;

(3) Reduce the capacitance parameter of C4. After testing and adjusting the relevant parameters of the above devices, the problem that the rise and fall time of the PWM waveform in the second mode exceeds the limit can be better solved.

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Figure 2. PWM Signal Schematic Using Amplifier and Op Amp

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Fig. 3 Schematic diagram of PWM signal with push-pull circuit

 

3.Distortion of PWM waveform

After the AC charging pile is connected to the electric vehicle through the charging connector, the CP signal is connected to the vehicle control device.

Due to the differences in the internal structure of different brands of electric vehicle, the access of vehicle control devices has a certain impact on the PWM signal.

Field tests show that the internal electrical quarantine of some vehicles is poor, for example, there is no effective electrical quarantine between the power cable and the control signal, which interferes with the PWM signal output by the charging pile after the PWM signal is connected to the vehicle controller, resulting in the distortion of the PWM waveform.

The AC charging pile judges the charging state by detecting the voltage signal amplitude of the detection point 1. When the PWM signal is mixed with a large interference signal, the voltage value collected and calculated by the charging pile will have a relatively large deviation, which is easy to cause the state judgment error.

 

Some charging piles do not consider the influence of external interference in the design of software and hardware, and the anti-interference ability of PWM signal is poor. In view of this kind of situation, needs to carry on the improvement from the software and the hardware, in the hardware design, on the one hand realizes the effective electric quarantine to the PWM signal in the pile, on the other hand carries on the filter processing to the PWM which enters the a/D converter in the charging pile interior; In the program design, for example, the sampling accuracy is improved by speeding up the sampling frequency.

According to the actual measurement, the influence caused by the interference can be effectively reduced through the improvement of the above methods.

 

The stability of CP signal of EV AC charging pile is the technical cornerstone to ensure the safety, reliability and efficiency of the charging process.

From the precise control of PWM amplitude, the strict restriction of rising and falling time, to the overall improvement of waveform anti-interference ability, every detail reflects the high compliance with standards and the unremitting pursuit of quality.

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